A data processing system of the type mentioned in the opening paragraph is known from "Efficient Code Generation for Horizontal Architectures: Compiler Techniques and Architectural Support", by Rau et al., 9.sup.th Annual Symposium on Computer Architecture, Austin, 1982, pp. 131-139. This literature also extensively discusses a field of application, namely parallel and iterative data processing. In this kind of data processing, new streams are created from various parallel streams of sequential data units of sequential data units. Before allowing the data units of the new streams to undergo processes again, these data units are to be delayed with respect to one another in order to be in a position to combine them with one another at the proper instant and in the proper manner. Since the series of operations is repeated cyclically, the delay of data units is effected by means of a temporary storage in a memory for the duration of cyclically recurrent delay times. Buffering the data units in the prior-art data processing system is effected with the aid of compacting means. These compacting means provide that, if so desired, after a data unit has been read out from one of the memory locations, the remaining stored data units can be rearranged over logically linked memory locations. When a new data unit is written, it is written into an unoccupied memory location having an address which is as near as possible to an address of the occupied memory locations. This rearranging of the data units, as well as the updating of the address of the nearest unoccupied memory location, leads to an efficient use of the available memory locations, admittedly, but requires a considerable amount of hardware.